Silicon validated
AF-R1
A radiation-tolerant RISC-V processor with integrated AI inference.
A power-efficient RV32IM processor with integrated AI inference and architecture-level radiation protection for control and edge compute.

Applications
Use it for satellite control, interfaces, telemetry, and edge decisions.
- Command and data handling for CubeSats and small satellites
- Payload housekeeping, telemetry, and sensor interfaces
- Screening sensor data onboard so less goes to the ground
- Subsystem control that needs radiation tolerance without rad-hard pricing
At a glance
- Core
- RV32IM
- Status
- Silicon validated
- Interfaces
- UART · SPI · I²C · GPIO
- Operating temp
- -40 to +125 °C
Block diagram
AF-R1
On-chip compute, memory protection, and satellite I/O
RV32IM core
RISC-V CPU for control and application code
AI engine
Integrated inference accelerator for payload data
SRAM + ECC
ECC-protected on-chip memory
Simplified functional block diagram. Interfaces and specifications subject to final datasheet.
Specifications
Core
- Architecture
- RV32IM
- AI engine
- On-chip MAC array
- Memory
- SRAM with ECC
- Hardening
- TMR, 21 groups, runtime-selectable per group
All performance figures on this page are measured on silicon.
Clock & supply
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Supply (VDD) | 2.5 | 3.3 | 3.6 | V |
| Max frequency* | 16 | 26 | 28 | MHz |
| Active power at 10 MHz* | 30 | 76 | -- | mW |
| Standby current | -- | < 1 | -- | mA |
Measured at room temperature. Starred rows: min / typ / max at 2.5 / 3.3 / 3.6 V supply. Power figures ±10% (sample spread and meter resolution).
Temperature
| Parameter | Min | Typ | Max | Unit |
|---|---|---|---|---|
| Operating | -40 | 25 | 125 | °C |
| Storage | -65 | 25 | 150 | °C |
Interfaces
- Serial
- UART, SPI, I²C
- SPI slave clock
- up to fSYS / 3
- Digital
- GPIO, PWM, timers, watchdog
- Boot
- QSPI execute-in-place
- Debug
- JTAG, TCK to 10 MHz
Standard IO.
Full serial, control, boot, and debug.
Package
- Signal I/O
- 54 pads
- Package
- COB
Radiation
Radiation tolerance by architecture.
AF-R1 uses triple modular redundancy on critical logic and ECC-protected memory.
TID and single-event test results will be published here as characterization completes.
Ordering
For questions about AF-R1 or the processor roadmap, get in touch.
Evaluation hardware for AF-R1
Specifications are preliminary and subject to change. Orders are subject to export screening.

